The present invention is related to the establishment of paths from a channel to a control unit in a computer input/output (I/O) system, and is more particularly related to the establishment of logical channel paths between channels and control units wherein a switch is located between one or more of the channels and one or more of the control units.
In computer I/O systems, it has long been the practice to identify the communication paths between a channel and an I/O control unit. U.S. Pat. No. 3,400,371 issued Sep. 3, 1968 to Amdahl et al for "Data Processing System", at column 100, lines 30-33, discloses assigning a distinct address for each path of communications for input/output devices that are accessible through more than one channel.
U.S. Pat. No. 4,760,553 issued Jul. 26, 1980 to Buckley et al for "Terminal System Configuration Tracing Method and Apparatus" discloses a terminal controller system wherein several feature cards are plugged into slots on a board, and I/O signal cards are connected between cards and/or remote multiplexors or terminals. A processor performs a test which enables the processor to logically establish the physical link to particular cards connected to its ports.
U.S. Pat. No. 4,922,410 issued May 1, 1990 to Morikawa et al for "Input/Output System Capable of Allotting Addresses to a Plurality of Input/Output Devices" discloses an input/output process device for controlling data transfers between a central processing unit and an input/output device through a channel by use of a plurality of input/output control devices connected to the input/output device. A memory unit stores information representing the address of the input/output control device in association with an identification number of the channels connected to the input/output control device.